Section Article

  • Scheduling Network-on-Chip Switches for Quality-of-Service and Hardware Resource Adaptation

    Abstract

    As nanotechnology continues to advance it is becoming possible to implement ultra-large-scale integration systems on chips (SoC). In todays world the efficiency of SoCs is increasingly leading to the performance of more sophisticated applications particularly in the field of communication. For the purpose of creating an organized and scalable system on chip a Network on Chip (NoC) is a projection of principles that have been inherited from the subject areas of distributed systems and computer networks. These concepts are used to link IP (Intellectual Property) cores. Real-time needs are becoming more difficult to achieve as the complexity of standard operating systems (SoC) continues to increase. In the field of NoC research global communication in SoC is addressed which involves shifting from a computation-centric to a communication-centric approach. In order to construct a real-time NoC it is necessary to construct components that are predictable in terms of compute memory and commun